KC705を用いたYarrの設定/How to setup KC705-Yarr system¶

This document covers how to setup a KC705-Yarr system on CentOS 7.

Things to prepare¶

KC705 Evaluation Board
PC with CentOS 7 installed (tested with CentOS Linux release 7.4.1708)
Xilinx Vivado ver. 2016.2 (same as the development environment of YARR on XPressK7)

Yarr-FEI4 system¶

FEI4 module
FMC-VHDCI, VHDCI to 8xRJ45 FE-I4 Rev. A adapter cards (Should be attached to FMC-LPC)
- https://twiki.cern.ch/twiki/bin/view/Main/TimonHeim?forceShow=1#VHDCI_to_8xRJ45_FE_I4_Rev_A
- https://twiki.cern.ch/twiki/bin/view/Main/TimonHeim?forceShow=1#FMC_to_VHDCI_Rev_B

Yarr-RD53A system¶

RD53A module
FMC to 4xmDP adapter cards aka Ohio-card (Port A-D on FMC-HPC are TX/RX=0-3, Port A-D on LPC are TX/RX=4-7)
- https://twiki.cern.ch/twiki/bin/viewauth/RD53/RD53ATesting#Multi_Chip_FMC

Using pre-compiled firmwares¶

Download firmwares from gitlab.cern.ch¶

git clone -b kc705 https://gitlab.cern.ch/YARR/YARR-FW.git

Write firmware¶

Open Vivado Hardware Manager and write .bit or .mcs under syn/kc705/[desired version] to your KC705.
(Examples of [desired version] are bram_rd53a_octa_ohio, bram_fei4_octa_lbnl and so on…)
(Choose the right one for your adapter card.)

TIPS: How to add a memory device of KC705 in Vivado Hardware Manager

Right click on “Hardware window”, then “Add Configuration Memory Device”.
Memory type: 28f00ap30t-…

OBSOLETE: Compilation of the firmware (Optional for firmware developers)¶

Project making on Vivado¶

#For FEI4
git clone -b kc705 https://github.com/hrsmnr/Yarr-fw.git
./Yarr-fw/syn/kc705/bram_fei4_octa_revA/mkproject.sh

#For RD53A
git clone -b kc705_rd53a https://github.com/hrsmnr/Yarr-fw.git
cd ./Yarr-fw/syn/kc705/bram_rd53a_quad_ohio
./mkproject.sh

This scripts makes a Vivado project and also generate .bit and .mcs files.

Vivado TIPS¶

Start Vivado GUI

source /opt/Xilinx/Vivado/2016.2/settings64.sh
vivado yarr/yarr.xpr

Update IP cores

Tools->Report IP Status.
And then update all IP cores (by the “Upgrade Selected” button).
This process is needed when you change the FPGA models (and Vivado versions?).

BIT file generation

Click “Generate Bitstream” to generate a .bit file.

MCS file generation

Based on GUI:
Tools->Generate Memory Configuration File
Format: Memory Part: 28f00ap30t-bpi-x16
Filename: output_filename.mcs
Check “Load bitstream files”, and then choose your .bit file (it’s in [project name].runs/impl_1/top_level.bit by default).
(Check “Overwrite” if needed.)

or Based on TCL command (inside the vivado tcl console):
write_cfgmem -format mcs -size 128 -interface BPIx16 -loadbit {up 0x00000000 “/path/to/your/bit/fileh/top_level.bit” } -file /path/to/your/mcs/file/20YYMMDD.mcs

Write configulation on your KC705¶

Add a memory device of KC705 in Vivado Hardware Manager

Right click on “Hardware window”, then “Add Configuration Memory Device”.
Memory type: 28f00ap30t-…

Install a device driver

Follow instructions on the official YARR git repository…
https://github.com/Yarr/Yarr/blob/master/doc/kernel_driver.md

Common mistakes, tips¶

Do not use FMC-HPC for FEI4!! Use FMC-LPC for your adapter card.
LAN cables for FEI4 should be “STRAIGHT-type”.
Some software errors might be disappeared by increase the LV value. (Applying 2A by the Coonstant Current mode should be default.)