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- The master TTM and eight slave TTMs are synchronized with
the global clock (64MHz) of the Belle DAQ system.
- In the normal data taking, DRESET is issued without Fcode,
whereas in SVD1.0 TDR F26 is assigned for this purpose.
- The calibration procedure for the VA1 gain has been
introduced.
- The L0 trigger has been introduced.
Hazumi
2001-06-22